The present invention relates to diagnostic units, particularly those diagnostic units having utility in testing bus-connected data-processing systems.
In the past few years data processing systems, particularly of the micro- and minicomputer type, have a plurality of either synchronous or asynchronously operating units which are all tied together via a multiconductor bus. When such units include programmable units having multiprogramming capabilities, diagonosis of error conditions within such a system becomes extremely complex. Such error conditions can result from software errors or microcode errors, as well as hardware errors. Accordingly, such diagnostic unit must be capable of being selectively inserted at one of any diverse locations in the bus for maximizing testing flexibility.
Some prior art testing techniques have included a separate diagnostic bus independent of the data transfer busses. Such diagnostic busses include addressing unit techniques for isolating a failing unit, whether it be caused by software or hardware. However, such units do not have the facility for testing the system of such interconnected units in a system sense, particularly for injection of anomalous signals for test purposes. Attwood et al. in U.S. Pat. No. 3,603,936 teach simulating conditions by injection of microcode within a control memory. While this sytem is highly advantageous for debugging microcode sequences, it is not particularly adaptable for testing multiunit systems of the bus connected type. As example of additional testing for diagnostic circuits incorporated with the data processing system is shown by Crane in U.S. Pat. No. 3,553,654. There a rack fault circuit is connected to a plurality of computing elements, however, not of the bus connected type. Additional examples of diagnostic connections are included in the IBM Technical Disclosure Bulletin in articles by W. A. Boothroyd and P. M. Chan, "Half Duplex Teleprocess Organization," May 1970, pages 2319-2320, as well as by R. W. Macak and J. R. Mathis in "Program Controlled Test of External Interface," March 1970, page 1614. The latter shows testing interfaces of cascade connected units using simulation hardware integral with the units connected to a computer or CPU.
It is desired that greater flexibility in testing of bus-connected data-processing units be available.